The main tasks of this paper are as follows : ( 1 ) carries on the analysis to 32-bit mips processor architecture and the mips five stages pipeline, and obtains the restriction factor of mips pipeline efficiency . and analyzed the feasibility of further enhancing the mips pipeline ’ s efficiency 本文的主要工作内容如下:(1)对32位mips处理器的系统结构和mips现有的五级流水线结构进行分析,得出了mips流水线执行效率的瓶颈因素,并分析了进一步提高现有mips流水线执行效率的可行性。